Open AccessEfficient Energy Optimized Faithful Adder with Parallel Carry Generation
Author(s) -
K. N. Vijeyakumar,
S. Maragatharaj
Publication year - 2021
Publication title -
computers, materials and continua/computers, materials and continua (print)
Language(s) - Uncategorized
Resource type - Journals
SCImago Journal Rank - 0.788
H-Index - 40
eISSN - 1546-2226
pISSN - 1546-2218
DOI - 10.32604/cmc.2022.019789
Subject(s) - adder , carry save adder , computer science , carry (investment) , cmos , application specific integrated circuit , arithmetic , serial binary adder , block (permutation group theory) , computer hardware , algorithm , reduction (mathematics) , logic gate , logic block , parallel computing , mathematics , electronic engineering , field programmable gate array , engineering , geometry , finance , economics
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