Détection de défauts des convertisseurs de puissance d’un système éolien et validation par prototypage « FPGA in the loop »

The paper describes ageing mechanisms of the metallization layer deposited on the chips of power semiconductor devices, and the effects of its ageing on the electrical characteristics of a COOLMOSTM Transistor. We have tried to link the changes in electrical performances to the metallization degradation, in order to better understand the origin of the physical mechanisms of ageing and the effects of the degradation of the metallization layer on electrical performances of tested devices