z-logo
open-access-imgOpen Access
Optimization of electrical conductivity of SnS thin film of 0.2 < t ≤ 0.4 μm thicknes for field effect transistor application
Author(s) -
Thomas Ojonugwa Daniel,
U. E. Uno,
Kasim Uthman Isah,
Umaru Ahmadu
Publication year - 2021
Publication title -
revista mexicana de física
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.181
H-Index - 25
eISSN - 2683-2224
pISSN - 0035-001X
DOI - 10.31349/revmexfis.67.263
Subject(s) - materials science , thin film transistor , grain boundary , thin film , electrical resistivity and conductivity , semiconductor , grain size , microstructure , conductivity , field effect transistor , optoelectronics , analytical chemistry (journal) , transistor , composite material , layer (electronics) , nanotechnology , voltage , electrical engineering , chemistry , engineering , chromatography
This study is focused on the investigation of SnS thin film for transistor application. Electron trap which is associated with grain boundary effect affects the electrical conductivity of SnS semiconductor thin film thereby militating the attainment of the threshold voltage required for transistor operation. Grain size and grain boundary is a function of a semiconductor’s thickness. SnS semiconductor thin films of 0.20, 0.25, 0.30, 0.35, 0.40 μm were deposited using aerosol assisted chemical vapour deposition on glass substrates. Profilometry, Scanning electron microscope, Energy dispersive X-ray spectroscopy and hall measurement were used to characterise the composition, microstructure and electrical properties of the SnS thin film.  SnS thin films were found to consist of Sn and S elements whose composition varied with increase in thickness. The film conductivity was found to vary with grain size and grain boundary which is a function of the film thickness. The SnS film of 0.4 μm thickness shows optimal grain growth with a grain size of 130.31 nm signifying an optimum for the as deposited SnS films as the larger grains reduces the number of grain boundaries and charge trap density which allows charge carriers to move freely in the lattice thereby causing a reduction in resistivity and increase in conductivity of the films which is essential in obtaining the threshold voltage for a transistor semiconductor channel layer operation. The carrier concentration of due to low resistivity of 3.612 ×10 5 Ωcm of 0.4 μm SnS thin film thickness is optimum and favours the attainment of the threshold voltage for a field effect transistor operation hence the application of SnS thin film as a semiconductor channel layer in a field effect transistor.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom