Synthesis of n-operand modulo-three adders
Author(s) -
V. P. Suprun,
D.A. Gorodetskii
Publication year - 2010
Publication title -
automatic control and computer sciences
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.299
H-Index - 17
eISSN - 1558-108X
pISSN - 0146-4116
DOI - 10.3103/s0146411610030089
Subject(s) - adder , operand , modulo , arithmetic , realization (probability) , computer science , value (mathematics) , representation (politics) , electronic circuit , algorithm , mathematics , discrete mathematics , telecommunications , electrical engineering , statistics , machine learning , politics , political science , law , engineering , latency (audio)
A method of synthesis of modulo-three adders for the case of data representation in positional codes is presented. The method is oriented to the construction of two-level circuits consisting of OR elements and exclusive OR elements with given thresholds. The method is generalized to the realization of the operation ±X 1 ±X 2 ... ±X n = S (mod 3). A logical circuit of an adder with a controlled input is suggested such that the value of one of the digits of the result of the summation is realized on its single output.
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom