Design and Simulation of a 2GHz, 64×64 bit Arithmetic Logic Unit in 130nm CMOS Technology
Author(s) -
Maryam Sistanizadeh,
Reza Hosseini
Publication year - 2021
Publication title -
journal of iranian association of electrical and electronics engineers
Language(s) - English
Resource type - Journals
eISSN - 2676-6086
pISSN - 2676-5810
DOI - 10.29252/jiaeee.18.1.81
Subject(s) - bit (key) , cmos , arithmetic , unit (ring theory) , arithmetic logic unit , computer science , computer hardware , logic gate , 8 bit , computer architecture , engineering , electronic engineering , mathematics , mathematics education , computer security
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