ANALYSIS OF CAPACITANCE ACROSS INTERCONNECTS OF LOW-K DIELECTRIC USED IN A DEEP SUB-MICRON CMOS TECHNOLOGY | Zendy

Sonanvane Avinash | Zendy; Bhavana Joshi | Zendy; Ashok Madhu Mahajan | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

ANALYSIS OF CAPACITANCE ACROSS INTERCONNECTS OF LOW-K DIELECTRIC USED IN A DEEP SUB-MICRON CMOS TECHNOLOGY

Author(s) -

Sonanvane Avinash,

Bhavana Joshi,

Ashok Madhu Mahajan

Publication year - 2008

Publication title -

progress in electromagnetics research letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.245

H-Index - 33

ISSN - 1937-6480

DOI - 10.2528/pierl07112802

Subject(s) - cmos , capacitance , materials science , dielectric , low k dielectric , optoelectronics , high κ dielectric , electrical engineering , electronic engineering , engineering , physics , electrode , quantum mechanics

The paper presents the detailed analysis of the intercon- nect capacitance, crosstalk time and peak crosstalk voltage. The de- pendency of the couple capacitance and fringe capacitance on the in- terconnect layer dimensions affects significantly to the interconnect ca- pacitance. The peak crosstalk time obtained to be 13 femtoseconds for 9.6 femtoseconds of propagation delay, while the maximum crosstalk voltage obtained to be 178 mV.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research