LOSS REDUCTION IN SUBSTRATE INTEGRATED WAVEGUIDE STRUCTURES

A method for decreasing the loss in substrate integrated waveguide (SIW) structures is introduced. In this method, the dielectric substrate is partially removed. Accordingly, dielectric loss reduction has been explicated analytically. Its equivalence to the rectangular waveguide of solid walls which is partially fllled with dielectric has been identifled. A novel topology for demonstrating the idea is established and a low loss three port substrate integrated waveguide power divider is presented. This SIW power divider shows lower loss than conventional SIW power dividers. Proper TRL standards are realized for removing the efiect of transition and/or matching sections in measurement process. For a low-loss three-port PSIW power divider, the return loss below 10dB and transmission coe-cients between i3dB to i3:5dB from 8.75GHz to 10GHz have been achieved. The measured amplitude imbalance is less than §0:2dB, and the measured phase difierence between \S21 and \S31 is about 4 - in the same frequency band.