z-logo
open-access-imgOpen Access
DESIGN AND IMPLEMENTATION OF FPGA-BASED FFT CO-PROCESSOR USING VERILOG HARDWARE DESCRIPTION LANGUAGE
Author(s) -
Yung-Chong Lee,
Yee Kit Chan,
Voon Chet Koo
Publication year - 2021
Publication title -
progress in electromagnetics research b
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.208
H-Index - 47
ISSN - 1937-6472
DOI - 10.2528/pierb20122806
Subject(s) - verilog , field programmable gate array , computer science , fast fourier transform , hardware description language , computer hardware , computer architecture , embedded system , programming language , algorithm

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom