Modelling and Designing of Cascaded 9 Level Voltage Source Converter Based on DVR for Mitigating Harmonics in Distributed Power System using Unit Vector | Zendy

N. Eashwaramma et al. N. Eashwaramma et al. | Zendy

Open Access

Modelling and Designing of Cascaded 9 Level Voltage Source Converter Based on DVR for Mitigating Harmonics in Distributed Power System using Unit Vector

Author(s) -

N. Eashwaramma et al. N. Eashwaramma et al.

Publication year - 2018

Publication title -

international journal of electrical and electronics engineering research

Language(s) - English

Resource type - Journals

eISSN - 2278-943X

pISSN - 2250-155X

DOI - 10.24247/ijeeerfeb20182

Subject(s) - harmonics , power (physics) , voltage , computer science , electronic engineering , voltage source , power quality , unit (ring theory) , electrical engineering , engineering , physics , mathematics , quantum mechanics , mathematics education

The objective is to mitigate power quality problems and its occurrence on the distributed lines in power system field. Here, the harmonics are voltage sag, swell, total harmonic distortion and power factor correction. The capacitor supported dynamic voltage restorer (DVR) was designed with the 9 level cascaded multilevel inverter (MLI). This paper utilizes the error signal to control the triggering of the switches of an inverter using unit vector of space vector modulation and pulse width modulation inverter presage compensation scheme. SRFT has also been used for conversion of voltage from rotating vector to stationary. Main goal was to reduce power quality problems like sag, swell, and harmonics and power factor correction. Simulation results have been verified with and without MLI.

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