Analytic models of CMOS logic in various regimes | Zendy

Branko Dokić | Zendy; Tatjana Pesic-Brdjanin | Zendy; Rados Dabic | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

Analytic models of CMOS logic in various regimes

Author(s) -

Branko Dokić,

Tatjana Pesic-Brdjanin,

Rados Dabic

Publication year - 2014

Publication title -

serbian journal of electrical engineering

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.133

H-Index - 5

eISSN - 2217-7183

pISSN - 1451-4869

DOI - 10.2298/sjee140106022d

Subject(s) - cmos , transistor , electronic engineering , digital electronics , inversion (geology) , electronic circuit , voltage , computer science , logic gate , threshold voltage , pass transistor logic , pull up resistor , electrical engineering , engineering , paleontology , structural basin , biology

In this paper, comparative analytic models of static and dynamic characteristics of CMOS digital circuits in strong, weak and mixed inversion regime have been described. Term mixed inversion is defined for the first time. The paper shows that there is an analogy in behavior and functional dependencies of parameters in all three CMOS regimes. Comparative characteristics of power consumption and speed in static regimes are given. Dependency of threshold voltage and logic delay time on temperature has been analyzed. Dynamic model with constant current is proposed. It is shown that digital circuits with dynamic threshold voltage of MOS transistor (DT-CMOS) have better logic delay characteristics. The analysis is based on simplified current-voltage MOS transistor models in strong and weak inversion regimes, as well as PSPICE software using 180 nm technology parameters

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research