Open AccessThe Bang Bang PLL as a Clock Source in Serial-De-Serializer (SERDES) Applications
Author(s) -
Raleigh Smith
Publication year - 2021
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.22215/etd/2021-14406
Subject(s) - phase locked loop , jitter , electronic engineering , phase noise , computer science , clock recovery , clock rate , engineering , clock signal , cmos