
Transistor placement algorithm for automatic layout synthesis of CMOS/BiCMOS logic and interface circuits.
Author(s) -
Hongxia Xia
Publication year - 2018
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.22215/etd/1994-02637
Subject(s) - cmos , bicmos , computer science , interface (matter) , electronic engineering , pass transistor logic , transistor , electronic circuit , logic family , logic gate , electrical engineering , computer architecture , engineering , algorithm , logic synthesis , digital electronics , parallel computing , voltage , bubble , maximum bubble pressure method