Voltage Level Shifter Circuits in 45nm CMOS Technology - A Review

This paper demonstrates different voltage level shifter circuits in 45nm CMOS technology. In digital electronics the level shifter is also called as logic level shifter. It is a circuit used to translate signals from one logic level or voltage domain to another logic level or voltage domain. It allows compatibility between different blocks of system-on-chip (SoC) designs with different voltage requirements. The level shifter circuits are compared in terms of voltage shifting level, power dissipation and delay. The input signal is set to 0.3V. The dual supply voltages VDDH is set to 1.1V and VDDL is set to 0.3V. Simulations have been carried out in cadence® EDA tool. IndexTerms: Level shifter, DCVS, Current mirror, Wilson current mirror, Dual current mirror, Cadence, Subthreshold to above threshold level conversion.