Micromachined VLSI 3D electronics. Final report for period September 1, 2000 - March 31, 2001 | Zendy

C. P. Beetz | Zendy; Jörn Steinbeck | Zendy; Kevin Hsueh | Zendy

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Micromachined VLSI 3D electronics. Final report for period September 1, 2000 - March 31, 2001

Author(s) -

C. P. Beetz,

Jörn Steinbeck,

Kevin Hsueh

Publication year - 2001

Publication title -

osti oai (u.s. department of energy office of scientific and technical information)

Language(s) - English

Resource type - Reports

DOI - 10.2172/808738

Subject(s) - wafer , very large scale integration , electronics , silicon , period (music) , die (integrated circuit) , electrical engineering , materials science , optoelectronics , computer science , engineering , engineering physics , nanotechnology , physics , acoustics

The phase I program investigated the construction of electronic interconnections through the thickness of a silicon wafer. The novel aspects of the technology are that the length-to-width ratio of the channels is as high as 100:1, so that the minimum amount of real estate is used for contact area. Constructing a large array of these through-wafer interconnections will enable two circuit die to be coupled on opposite sides of a silicon circuit board providing high speed connection between the two

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