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Final Report for the Scaled Asynchronous Transfer Mode (ATM) Encryption Laboratory Directed Research and Development Project
Author(s) -
Lyndon G. Pierson,
Edward L. Witzke
Publication year - 1999
Language(s) - English
Resource type - Reports
DOI - 10.2172/2639
Subject(s) - encryption , synchronous optical networking , asynchronous communication , asynchronous transfer mode , computer science , synchronization (alternating current) , key (lock) , embedded system , computer hardware , cryptography , multiple encryption , mode (computer interface) , computer network , operating system , computer security , channel (broadcasting)
This effort studied the integration of innovative methods of key management crypto synchronization, and key agility while scaling encryption speed. Viability of these methods for encryption of ATM cell payloads at the SONET OC- 192 data rate (10 Gb/s), and for operation at OC-48 rates (2.5 Gb/s) was shown. An SNL-Developed pipelined DES design was adapted for the encryption of ATM cells. A proof-of-principle prototype circuit board containing 11 Electronically Programmable Logic Devices (each holding the equivalent of 100,000 gates) was designed, built, and used to prototype a high speed encryptor

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