Open AccessCollective Memory Transfers for Multi-Core Chips
Author(s) -
George Michelogiannakis,
Alexander Williams,
John Shalf
Publication year - 2013
Publication title -
osti oai (u.s. department of energy office of scientific and technical information)
Language(s) - Uncategorized
Resource type - Reports
DOI - 10.2172/1164908
Subject(s) - computer science , cas latency , instruction prefetch , memory controller , dram , embedded system , parallel computing , registered memory , interleaved memory , chip , scheduling (production processes) , multi core processor , computer hardware , cache , semiconductor memory , memory management , engineering , telecommunications , operations management
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