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Implementation of Face Recognition Processing Using an Embedded Processor
Author(s) -
Hiroyuki Kondo,
Masami Nakajima,
Mirosław Bober,
K. Kucharski,
Osamu Yamamoto,
Toru Shimizu
Publication year - 2005
Publication title -
journal of robotics and mechatronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.257
H-Index - 19
eISSN - 1883-8049
pISSN - 0915-3942
DOI - 10.20965/jrm.2005.p0428
Subject(s) - computer science , static random access memory , embedded system , multi core processor , multiprocessing , chip , facial recognition system , power consumption , face (sociological concept) , process (computing) , power (physics) , computer hardware , feature extraction , artificial intelligence , parallel computing , telecommunications , operating system , social science , physics , quantum mechanics , sociology
Embedded processors are conventionally difficult to use in face recognition in the security and robotic fields because of the tremendous amount of processing required. We implemented face recognition processing with a multicore based embedded processor having low power consumption and high performance. The single-chip multiprocessor is manufactured using a 0.15μm process with two M32R cores, 512KB of SRAM, and peripheral circuits integrated on a single-chip. It has a power supply voltage of 1.5V, a frequency of 600MHz, and power consumption of 800mW.

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