Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction | Zendy

Hideki Kazama | Zendy; Masanori Hariyama | Zendy; Michitaka Kameyama | Zendy

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Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction

Author(s) -

Hideki Kazama,

Masanori Hariyama,

Michitaka Kameyama

Publication year - 2000

Publication title -

journal of robotics and mechatronics

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.257

H-Index - 19

eISSN - 1883-8049

pISSN - 0915-3942

DOI - 10.20965/jrm.2000.p0534

Subject(s) - computer science , very large scale integration , ball (mathematics) , minification , scheduling (production processes) , robot , embedded system , real time computing , parallel computing , artificial intelligence , engineering , programming language , mathematical analysis , mathematics , operations management

In real-world applications, it is important to develop high-performance special-purpose processors that execute intelligent processing with a tremendous amount of input data. A robot that catches a moving ball is a typical example of real-world applications. In acquisition of 3-D coordinates of a ball trajectory, ball extraction is the most time-consuming processing. This paper presents an optimal design of a ball extraction VLSI processor. To reduce a chip area under a time constraint, minimization of memory capacity is achieved based on an immediate output generation scheduling.

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