A Speedup Algorithm for Repetition of Hypothetical Reasoning | Zendy

Haruhiko Kimura | Zendy; Tadanobu Misawa | Zendy; Kōji Abe | Zendy; Yasuhiro Ogoshi | Zendy

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A Speedup Algorithm for Repetition of Hypothetical Reasoning

Author(s) -

Haruhiko Kimura,

Tadanobu Misawa,

Kōji Abe,

Yasuhiro Ogoshi

Publication year - 2006

Publication title -

journal of advanced computational intelligence and intelligent informatics

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.172

H-Index - 20

eISSN - 1343-0130

pISSN - 1883-8014

DOI - 10.20965/jaciii.2006.p0207

Subject(s) - speedup , computer science , predicate (mathematical logic) , predicate logic , knowledge base , algorithm , first order logic , artificial intelligence , theoretical computer science , description logic , programming language , parallel computing

This paper presents performance evaluations of a speedup method for hypothetical reasoning to a first-order predicate logic knowledge base in the case when reasoning is executed repeatedly replacing hypothetical knowledge and keeping background knowledge and the goal intact. The proposed method consists of substituting hypotheses for predicate knowledge which has recursive structures, deriving bit patterns of solutions from background knowledge and the goal in advance when all the hypotheses are true, and finding actual solutions from inclusion relation with bit patterns of hypothetical knowledge.

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