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Reduction to practice is the fundamental goal of engineering and a consistent focus of all engineering education. This process has become increasingly difficult to realize, especially for educators who focus upon Very Large Scale Integrated (VLSI) circuit design. The complexity and cost of modern fabrication facilities are beyond both the financial reach and scope of the vast majority of universities. The Metal Oxide Semiconductor Implementation Service (MOSIS) has, for many years, permitted educators to bridge the gap between theory and practice in VLSI circuits. This service provides a low cost method through which student integrated circuit prototypes can actually be fabricated. In a matter of weeks, packaged circuits are delivered which exactly reflect a student’s design. Since commercial semiconductor manufacturers perform the actual fabrication, the consistency of the fabrication is excellent. A student’s success cannot be better validated than through this reduction to practice. As appealing as this MOSIS brokered fabrication may seem, there are many nuances in the administration, scheduling, submission and reporting process which can prove disheartening to the VLSI educator. Strict adherence to deadlines, precise formatting of transmission messages, specific computer communication protocols and set funding procedures are driven by the sheer number of MOSIS users. This paper will summarize four years of experience with MOSIS as an important educational tool. It highlights approaches, techniques and disciplines which will ensure the path to successful fabrications will be a smooth and supportive of the educational process.

Keys To Successful Vlsi Realization Through Mosis (How To Get Three Computers To Cooperate And Remain Sane)