Modeling a Perceptron Neuron Using Verilog Developed Floating-Point Numbering System and Modules for Hardware Synthesis

The purpose of a capstone design project is to provide graduating senior students the opportunity to demonstrate understanding of the concepts they have learned during the course of their studies. As with many engineering programs, students of the computer engineering program at Utah Valley University (UVU) conclude their degree programs with a semester capstone design experience. This paper presents the details of a sample project that a student has done in this capstone course. This senior design project implements the perceptron neural network using Systems Verilog HDL module development for FPGA synthesis. A floating-point binary numbering system is developed with which all arithmetic operation modules are designed. Benefits of hardware implemented neural networks include the parallelization of computational processes that are not provided in software implementations of such networks. All modules included in the network are simulated using Altera’s ModelSim platform and synthesized on Altera’s DE2-115 Development Board.