Open AccessIntegrating Asynchronous Digital Design And Testing Into The Undergraduate Computer Engineering Curriculum
Author(s) -
Scott C. Smith,
Waleed K. Al-Assadi
Publication year - 2020
Publication title -
2007 annual conference and exposition proceedings
Language(s) - English
Resource type - Conference proceedings
DOI - 10.18260/1-2--2762
Subject(s) - asynchronous communication , asynchronous system , computer science , asynchronous circuit , robustness (evolution) , curriculum , design flow , digital electronics , reuse , computer architecture , computer engineering , clock signal , embedded system , electronic engineering , electronic circuit , electrical engineering , synchronous circuit , engineering , telecommunications , jitter , biochemistry , gene , psychology , pedagogy , chemistry , waste management
As demand rises for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used in the semiconductor industry, as evidenced by the International Technology Roadmap for Semiconductors’ (ITRS) prediction of a likely shift from synchronous to asynchronous design styles in order to increase circuit robustness, decrease power, and alleviate many clock-related issues 1 . ITRS predicts that asynchronous circuits will account for 19% of chip area within the next 5 years, and 30% of chip area within the next 10 years 2 . To meet this growing industry need, students in Computer Engineering should be introduced to asynchronous circuit design to make them more marketable and more prepared for the challenges faced by the digital design community for years to come.
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