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Does Logic Synthesis Visualization Excite EETs?
Author(s) -
Maddumage Karunaratne
Publication year - 2020
Publication title -
2011 asee annual conference and exposition proceedings
Language(s) - Uncategorized
Resource type - Conference proceedings
DOI - 10.18260/1-2--17792
Subject(s) - verilog , computer science , electronic design automation , visualization , digital electronics , automation , field programmable gate array , electrical engineering , population , embedded system , engineering , electronic circuit , artificial intelligence , mechanical engineering , demography , sociology

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