Student Created Laboratory Exercises For A Digital Systems Design Course Using Hdl And Plds

The concepts presented in an introductory digital systems design lecture are often difficult for students to comprehend fully. In order to aid in this understanding, laboratory exercises are often assigned in order to reinforce the concepts introduced in lecture. These lab exercises also expose students to hardware, software, and hardware description languages used by industry professionals. We have been experimenting with a new paradigm for lab exercise creation, whereby previous students of a course are recruited to create new lab exercises for the course, a method we call “By Students, For Students” that we have tested with several different courses. This paper describes the result of applying this paradigm to a four semester hour introductory digital systems design course typically taken by sophomore electrical engineering and computer engineering majors. The lab exercises involve considerable use of programmable logic and the Verilog hardware description language (HDL). Interestingly, the student-created lab exercises tended to be more challenging than the previous set of faculty-created lab exercises.