Open AccessA high-speed low-power modulo 2ⁿ+1 multiplier design using carbon-nanotube technology
Author(s) -
Qi He
Publication year - 2012
Language(s) - Uncategorized
Resource type - Dissertations/theses
DOI - 10.17760/d20002537
Subject(s) - adder , carbon nanotube field effect transistor , cmos , power–delay product , multiplier (economics) , carry save adder , multiplexer , serial binary adder , computer science , electronic engineering , computer hardware , electrical engineering , transistor , multiplexing , engineering , voltage , field effect transistor , economics , macroeconomics
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