Open AccessThe unified floating point vector coprocessor for reconfigurable hardware
Author(s) -
Jainik Kathiara
Publication year - 2010
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.17760/d20002060
Subject(s) - floating point , emulation , field programmable gate array , coprocessor , computer science , embedded system , homogeneous , reconfigurable computing , double precision floating point format , computer hardware , point (geometry) , software , operating system , mathematics , geometry , combinatorics , economics , economic growth
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom