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Chip-to-Module Interconnections Using “Sea of Leads” Technology
Author(s) -
Muhannad S. Bakir,
H.A. Reed,
A.V. Mule,
Joseph Paul Jayachandran,
Paul A. Kohl,
K. P. Martin,
Thomas K. Gaylord,
J.D. Meindl
Publication year - 2003
Publication title -
mrs bulletin
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.19
H-Index - 153
eISSN - 1938-1425
pISSN - 0883-7694
DOI - 10.1557/mrs2003.19
Subject(s) - interconnection , microsystem , wafer , materials science , integrated circuit , chip , cladding (metalworking) , wafer level packaging , electronic circuit , computer science , optoelectronics , electronic engineering , electrical engineering , nanotechnology , engineering , telecommunications , metallurgy

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