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Implementation of Loop Pipelining and Assignment Inlining in the C-to-HDL Translator
Author(s) -
Alexey Merkulov,
Andrey Belevantsev
Publication year - 2012
Publication title -
trudy instituta sistemnogo programmirovaniâ ran/trudy instituta sistemnogo programmirovaniâ
Language(s) - English
Resource type - Journals
eISSN - 2220-6426
pISSN - 2079-8156
DOI - 10.15514/ispras-2012-23-2
Subject(s) - computer science , verilog , operand , parallel computing , software pipelining , field programmable gate array , programming language , embedded system , compiler , computer architecture , computer hardware

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