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Instruction scheduling and software pipelining for modern architectures
Author(s) -
Arutyun Avetisyan
Publication year - 2012
Publication title -
trudy instituta sistemnogo programmirovaniâ ran/trudy instituta sistemnogo programmirovaniâ
Language(s) - English
Resource type - Journals
eISSN - 2220-6426
pISSN - 2079-8156
DOI - 10.15514/ispras-2012-22-2
Subject(s) - computer science , software pipelining , parallel computing , speedup , instruction level parallelism , instruction scheduling , instruction set , scheduling (production processes) , compiler , heuristics , register allocation , critical path method , schedule , dynamic priority scheduling , programming language , operating system , two level scheduling , parallelism (grammar) , operations management , engineering , systems engineering , economics

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