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Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA
Author(s) -
Takashi Soga,
Kenta Yamaguchi,
Raghunandan Mathur,
Osamu Watanabe,
Akihiro Musa,
Ryusuke Egawa,
Hiroaki Kobayashi
Publication year - 2020
Publication title -
supercomputing frontiers and innovations
Language(s) - English
Resource type - Journals
eISSN - 2409-6008
pISSN - 2313-8734
DOI - 10.14529/jsfi200401
Subject(s) - supercomputer , computer science , parallel computing , computation , message passing interface , memory bandwidth , bandwidth (computing) , multi core processor , shared memory , exploit , message passing , idle , solver , code (set theory) , operating system , computer network , computer security , set (abstract data type) , algorithm , programming language
Modern high-performance computing (HPC) systems consist of a large number of nodes featuring multi-core processors. Many computational fluid dynamics (CFD) codes utilize a Message Passing Interface (MPI) to exploit the potential of such systems. In general, the MPI communication costs increase as the number of MPI processes increases. In this paper, we discuss performance of the code in which a core is used as a dedicated communication core when the core cannot contribute to the performance improvement due to memory-bandwidth limitations. By using the dedicated communication core, the communication operations are overlapped with computation operations, thus enabling highly efficient computation by exploiting the limited memory bandwidth and idle cores. The performance evaluation shows that this code can hide the MPI communication times of 90% on the supercomputer SX-ACE system and 80% on the supercomputer SX-Aurora TSUBASA system, and the performance of the successive over-relaxation (SOR) method is improved by 32% on SX-ACE and 20% on SX-Aurora TSUBASA.

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