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An Area-efficient Microstrip Diplexer with a Novel Structure and Low Group Delay for Microwave Wireless Applications
Author(s) -
Salah I. Yahya,
Abbas Rezaei
Publication year - 2020
Publication title -
aro-the scientific journal of koya university
Language(s) - English
Resource type - Journals
eISSN - 2410-9355
pISSN - 2307-549X
DOI - 10.14500/aro.10753
Subject(s) - diplexer , microstrip , resonator , microwave , wireless , equivalent circuit , harmonics , electronic engineering , insertion loss , computer science , topology (electrical circuits) , materials science , electrical engineering , optoelectronics , telecommunications , engineering , voltage
In this work, a novel structure of a microstrip diplexer consisting of coupled patch cells is presented. It works at 2.5 GHz and 4.7 GHz for wireless applications. The proposed structure is well miniaturized with a compact area of 0.015 λg 2, fabricated on 0.787 mm substrate height. It has two wide fractional bandwidths (FBWs) of 28% and 17.9% at the lower and upper channels, respectively. Another feature of the proposed design is the low group delays, which are better than 0.4 ns for both channels. Moreover, the designed diplexer can suppress the harmonics up to 10 GHz. Meanwhile, the insertion losses at both channels are low. The design method is based on proposing an approximated equivalent LC circuit of a novel basic resonator. The information about the resonator behavior is extracted from the even and odd modes analysis of the proposed equivalent LC circuit. Finally, our introduced diplexer is fabricated and measured to verify the simulation results, where the simulated and measured results are in a good agreement.

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