Efficient Digital System Management using IEEE 1451.0 Enabled Control Architecture
Author(s) -
J. Kamala,
B. Umamaheswari,
T. Jaibalaganesh
Publication year - 2019
Publication title -
defence science journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.198
H-Index - 32
eISSN - 0976-464X
pISSN - 0011-748X
DOI - 10.14429/dsj.69.14412
Subject(s) - smart transducer , interface (matter) , transducer , documentation , embedded system , digital control , engineering , computer science , control system , electronic engineering , electrical engineering , operating system , bubble , maximum bubble pressure method
The IEEE and National Institute of Standards and Technology have formulated an open universal standard called IEEE 1451 for ‘Smart Transducer Interface’ with digital systems. The objectives of this paper is to propose IEEE 21450 enabled control architectures for efficient management of power system with embedded system parameters as electronic documentation. The control architecture accommodates appropriate number of transducer interface module along with transducer electronic data sheet, which enables active calibration, adaptive tuning and failure proof operation of system management. Smart controller functionalities are implemented by Artix 7 field programmable gate array (FPGA). Interface requirements, hardware utilisation, timing informations are provided for specific hardware. Calibration of sensor data, estimator execution and IEEE service command for read transducer data are validated through Xilinx simulations.
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom