Non-Volatile Flip-Flop Based on Unipolar ReRAM for Power-Down Applications
Author(s) -
Jean-Michel Portal,
M. Bocquet,
Damien Deleruyelle,
Christophe Müller
Publication year - 2012
Publication title -
journal of low power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.146
H-Index - 16
eISSN - 1546-2005
pISSN - 1546-1998
DOI - 10.1166/jolpe.2012.1172
Subject(s) - resistive random access memory , flip flop , reset (finance) , block (permutation group theory) , computer science , power (physics) , non volatile memory , context (archaeology) , flops , architecture , electronic engineering , computer hardware , electrical engineering , parallel computing , engineering , cmos , voltage , physics , quantum mechanics , art , paleontology , geometry , mathematics , financial economics , economics , visual arts , biology
In this paper, we propose a new architecture of non-volatile Flip-Flop based on ReRAM unipolar resistive memory element (RNVFF). This architecture is proposed in the context of power-down applications. Flip-Flop content is saved into ReRAM memory cell before power-down and restored after power-up. To simulate such a structure a compact model of unipolar ReRAM was developed and calibrated on best in class literature data. The architecture of the RNVFF, based on the insertion of a non-volatile memory block before a master-slave Flip-Flop, is detailed. The save and restore processes are described from the succession of four operating modes (normal, save, read, reset) needed by the save and restore processes. Finally, the structure is fully validated through electrical simulations, when the data to save is either ‘0’ or ‘1’.
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