High linearity CMOS variable gain amplifier for UWB applications

A large dynamic-range Programmable Variable Gain Amplifier (PVGA) suitable for Ultra Wide Band (UWB) applications is presented. The PVGA is composed of three programmable variable gain amplifier stages followed by an output buffer. Such wide bandwidth allows our proposed PVGA to be used in multi-standard protocols. Power reduction is developed for the variable gain amplifier stages. Thorough analyses of the mid-band gain and noise are presented; and design tradeoffs are carefully handled. The PVGA circuit is designed and simulated in 0.13 µm IBM-CMOS process; the overall PVGA with buffer consumes 25 mA from a 1.5 V supply. The PVGA achieves 54.5 dB dynamic-range (DR), 17.6 dBm IIP3, -42.31 dB THD at peak-to-peak differential output voltage of 1 V, and frequency 400 MHz Moreover; the pro-posed circuit reports a good noise performance; the average integrated noise is 121.6 nV/Hz at minimum gain of -0.5 dB.