Open AccessChaos Generation Using BJT′s and PLL′s
Author(s) -
Umesh Kumar
Publication year - 2000
Publication title -
active and passive electronic components
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.144
H-Index - 22
eISSN - 1026-7034
pISSN - 0882-7516
DOI - 10.1155/apec.23.97
Subject(s) - chaos (operating system) , phase locked loop , bipolar junction transistor , reliability engineering , computer science , electrical engineering , engineering , computer security , voltage , transistor , jitter
There are several simple equations which can be used to generate chaotic waveforms. We present two such equations, called the Duffing equation and the Ueda equation. Theduffing equation displays a chaotic trajectory for particular values of the parameters. A two-BJT circuit and a PLL circuit are used as shown
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