z-logo
open-access-imgOpen Access
Hardware Sharing for Channel Interleavers in 5G NR Standard
Author(s) -
Xiaokang Xiong,
Yuhang Dai,
Zhuhua Hu,
Kejia Huo,
Yong Bai,
Hui Li,
Dake Liu
Publication year - 2021
Publication title -
security and communication networks
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.446
H-Index - 43
eISSN - 1939-0114
pISSN - 1939-0122
DOI - 10.1155/2021/8872140
Subject(s) - computer science , interleaving , low density parity check code , channel (broadcasting) , cyclic redundancy check , control channel , computer hardware , correctness , transmission (telecommunications) , reuse , error detection and correction , fading , bit error rate , computer network , algorithm , decoding methods , telecommunications , ecology , biology , operating system
Interleaver module is an important part of modernmobile communication system. It plays an important role in reducing bit error rate and improving transmission efficiency over fading channels. In 5G NR (5th Generation New Radio) standards, LDPC (lowdensity parity-check) and polar channel codes are employed for data channels and control channels, respectively. If multiple interleavers are implemented separately for them, the cost increases significantly. To address this issue, a hardware multiplexing scheme for channel interleavers based on LDPC and polar codes is proposed in this paper. Firstly, the formulas for the processes of the control channel interleaving and data channel interleaving are derived with respect to 5G NR standard. ,en, the hardware implementation structures of the two interleavers are given. Subsequently, hardware reuse is proposed by sharing the similar or identical parts between the two hardware structures. Simulation results verify the correctness of our proposed scheme and demonstrate that it can realize the hardware sharing of the two kinds of channel interleavers to reduce the cost of silicon.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom