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This paper presents a novel topology for multipurpose drivers for MEMS sensors and actuators, suitable for integration in low-cost high-voltage (HV) CMOS processes, without a triple well. The driver output voltage, , can be programmed over a wide, symmetrical range of positive and negative values, with the maximum output voltage being limited only by the maximum drain-source voltage that the HV transistors can handle. The driver is also able to short its output to the ground line and to leave it floating. It comprises generators for large positive and negative voltages followed by an LDO for each polarity that ensures that has a well-controlled level and a very low ripple. The LDOs also help implement the grounded- and floating-output operating modes. Most of the required circuitry is integrated within a HV CMOS ASIC: the drivers for the large voltage generators, the error amplifiers of the LDOs, the DAC used to program the level, and their support circuits. Thus, only the power stages of the large voltage generators, the pass transistors of the LDOs and two resistors for the LDO feedback network are discrete. A suitable configuration was devised for the latter that allows for the external resistor network to be shared by the two LDOs and prevents negative voltages from developing at the ASIC pins. Two circuit implementations of the proposed topology, designed in a low-cost 0.18 μm HV CMOS process, are presented in some detail. Simulation results demonstrate that they realize the required operating modes and provide voltages programmable with steps of 100 mV or 200 mV, between -20 V and +20 V or between −45 V and +45 V, respectively. The output voltage ripple is relatively small, just 3.4 mVpkpk for the first implementation and 17 mVpkpk for the second. Therefore, both circuits are suitable for biasing and controlling a wide range of MEMS devices, including MEMS mirrors used in applications such as endoscopic optical coherence tomography.

Multipurpose Drivers for MEMS Devices Based on a Single ASIC Implemented in a Low-Cost HV CMOS Process without a Triple Well