Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology | Zendy

Aparna Prayag | Zendy; Sanjay Bodkhe | Zendy

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Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology

Author(s) -

Aparna Prayag,

Sanjay Bodkhe

Publication year - 2017

Publication title -

advances in electrical engineering

Language(s) - English

Resource type - Journals

eISSN - 2356-6655

pISSN - 2314-7636

DOI - 10.1155/2017/5640926

Subject(s) - topology (electrical circuits) , matlab , block (permutation group theory) , voltage , inverter , computer science , power (physics) , electronic engineering , mathematics , engineering , electrical engineering , physics , geometry , quantum mechanics , operating system

In this paper a basic block of novel topology of multilevel inverter is proposed. The proposed approach significantly requires reduced number of dc voltage sources and power switches to attain maximum number of output voltage levels. By connecting basic blocks in series a cascaded multilevel topology is developed. Each block itself is also a multilevel inverter. Analysis of proposed topology is carried out in symmetric as well as asymmetric operating modes. The topology is investigated through computer simulation using MATLAB/Simulink and validated experimentally on prototype in the laboratory

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