A Low Complexity All-Digital Background Calibration Technique for Time-Interleaved ADCs
Author(s) -
Hongmei Chen,
Yongsheng Yin,
Honghui Deng,
Fujiang Lin
Publication year - 2016
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/2016/6475932
Subject(s) - effective number of bits , computer science , offset (computer science) , calibration , energy (signal processing) , channel (broadcasting) , algorithm , electronic engineering , filter (signal processing) , mathematics , statistics , telecommunications , cmos , engineering , computer vision , programming language
A low complexity all-digital background calibration technique based on statistics is proposed. The basic idea of the statistics calibration technique is that the output average energy of each channel of TIADC will be consistent ideally, since each channel samples the same input signal, and therefore the energy deviation directly reflects the mismatch errors of channels. In this work, the offset mismatch and gain mismatch are calibrated by an adaptive statistics calibration algorithm based on LMS iteration; the timing mismatch is estimated by performing the correlation calculation of the outputs of subchannels and corrected by an improved fractional delay filter based on Farrow structure. Applied to a four-channel 12-bit 400 MHz TIADC, simulation results show that, with calibration, the SNDR raises from 22.5 dB to 71.8 dB and ENOB rises from 3.4 bits to 11.6 bits for a 164.6 MHz sinusoidal input. Compared with traditional methods, the proposed schemes are more feasible to implement and consume less hardware resources
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