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Effective Task Scheduling and IP Mapping Algorithm for Heterogeneous NoC-Based MPSoC
Author(s) -
Pengfei Yang,
Quan Wang
Publication year - 2014
Publication title -
mathematical problems in engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.262
H-Index - 62
eISSN - 1026-7077
pISSN - 1024-123X
DOI - 10.1155/2014/202748
Subject(s) - mpsoc , computer science , scheduling (production processes) , network on a chip , multiprocessing , particle swarm optimization , power consumption , network topology , task (project management) , parallel computing , distributed computing , embedded system , algorithm , power (physics) , computer network , engineering , physics , systems engineering , quantum mechanics , operations management
Quality of task scheduling is critical to define the network communication efficiency and the performance of the entire NoC- (Network-on-Chip-) based MPSoC (multiprocessor System-on-Chip). In this paper, the NoC-based MPSoC design process is favorably divided into two steps, that is, scheduling subtasks to processing elements (PEs) of appropriate type and quantity and then mapping these PEs onto the switching nodes of NoC topology. When the task model is improved so that it reflects better the real intertask relations, optimized particle swarm optimization (PSO) is utilized to achieve the first step with expected less task running and transfer cost as well as the least task execution time. By referring to the topology of NoC and the resultant communication diagram of the first step, the second step is done with the minimal expected network transmission delay as well as less resource consumption and even power consumption. The comparative experiments have shown the preferable resource and power consumption of the algorithm when it is actually adopted in a system design

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