A Circuit Model for CMOS Hall Cells Performance Evaluation including Temperature Effects | Zendy

MariaAlexandra Paun | Zendy; Jean-Michel Sallèse | Zendy; Maher Kayal | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

A Circuit Model for CMOS Hall Cells Performance Evaluation including Temperature Effects

Author(s) -

MariaAlexandra Paun,

Jean-Michel Sallèse,

Maher Kayal

Publication year - 2013

Publication title -

advances in condensed matter physics

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.314

H-Index - 26

eISSN - 1687-8124

pISSN - 1687-8108

DOI - 10.1155/2013/968647

Subject(s) - cadence , cmos , scalability , finite element method , voltage , hall effect , electronic engineering , materials science , computer science , electrical engineering , physics , optoelectronics , engineering , electrical resistivity and conductivity , database , thermodynamics

In order to provide the information on their Hall voltage, sensitivity, and drift with temperature, a new simpler lumped circuit model for the evaluation of various Hall cells has been developed. In this sense, the finite element model proposed by the authors in this paper contains both geometrical parameters (dimensions of the cells) and physical parameters such as the mobility, conductivity, Hall factor, carrier concentration, and the temperature influence on them. Therefore, a scalable finite element model in Cadence, for behavior simulation in circuit environment of CMOS Hall effect devices, with different shapes and technologies assessing their performance, has been elaborated

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research