Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor
Author(s) -
Phan Trong Tue,
Takaaki Miyasako,
Eisuke Tokumitsu,
Tatsuya Shimoda
Publication year - 2013
Publication title -
advances in materials science and engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.356
H-Index - 42
eISSN - 1687-8442
pISSN - 1687-8434
DOI - 10.1155/2013/692469
Subject(s) - materials science , ferroelectricity , optoelectronics , transistor , insulator (electricity) , thin film transistor , coercivity , threshold voltage , voltage , layer (electronics) , dielectric , nanotechnology , electrical engineering , condensed matter physics , physics , engineering
We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT) which uses solution-processed indium-tin-oxide (ITO) and lead-zirconium-titanate (PZT) film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1) a reduction of the charge injection and (2) an increase of effective coercive voltage dropped on the insulator
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