A VLSI Architecture for the V-BLAST Algorithm in Spatial-Multiplexing MIMO Systems | Zendy

Pedro Cervantes-Lozano | Zendy; Luis F. González-Pérez | Zendy; Andres García-García | Zendy

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A VLSI Architecture for the V-BLAST Algorithm in Spatial-Multiplexing MIMO Systems

Author(s) -

Pedro Cervantes-Lozano,

Luis F. González-Pérez,

Andres García-García

Publication year - 2013

Publication title -

journal of engineering

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.244

H-Index - 20

eISSN - 2314-4912

pISSN - 2314-4904

DOI - 10.1155/2013/534735

Subject(s) - spatial multiplexing , mimo , very large scale integration , multiplexing , computer science , rayleigh fading , field programmable gate array , throughput , algorithm , context (archaeology) , path (computing) , electronic engineering , computer engineering , parallel computing , computer hardware , fading , engineering , channel (broadcasting) , embedded system , wireless , telecommunications , computer network , decoding methods , paleontology , biology

This paper presents a VLSI architecture for the suboptimal hard-output Vertical-Bell Laboratories Layered Space-Time (V-BLAST) algorithm in the context of Spatial Multiplexing Multiple-Input Multiple-Output (SM-MIMO) systems immersed in Rayleigh fading channels. The design and implementation of its corresponding data-path and control-path components over FPGA devices are considered. Results on synthesis, bit error rate performance, and data throughput are reported

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