Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs | Zendy

M. Karthigai Pandian | Zendy; N. B. Balamurugan | Zendy; A. Pricilla | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs

Author(s) -

M. Karthigai Pandian,

N. B. Balamurugan,

A. Pricilla

Publication year - 2013

Publication title -

active and passive electronic components

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.144

H-Index - 22

eISSN - 1026-7034

pISSN - 0882-7516

DOI - 10.1155/2013/153157

Subject(s) - threshold voltage , inversion (geology) , nanowire , silicon , optoelectronics , silicon nanowires , materials science , transistor , voltage , mosfet , channel (broadcasting) , quantum , electrical engineering , electronic engineering , physics , engineering , quantum mechanics , paleontology , structural basin , biology

An improved physics-based compact model for a symmetrically biased gate-all-around (GAA) silicon nanowire transistor is proposed. Short channel effects and quantum mechanical effects caused by the ultrathin silicon devices are considered in modelling the threshold voltage. Device geometrics play a very important role in multigate devices, and hence their impact on the threshold voltage is also analyzed by varying the height and width of silicon channel. The inversion charge and electrical potential distribution along the channel are expressed in their closed forms. The proposed model shows excellent accuracy with TCAD simulations of the device in the weak inversion regime

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research