Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip
Author(s) -
William V. Kritikos,
Andrew G. Schmidt,
Ron Sass,
Erik K. Anderson,
Matthew French
Publication year - 2012
Publication title -
international journal of reconfigurable computing
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.236
H-Index - 16
eISSN - 1687-7209
pISSN - 1687-7195
DOI - 10.1155/2012/872610
Subject(s) - computer science , embedded system , overhead (engineering) , computer architecture , software , chip , programming paradigm , interface (matter) , application programming interface , system on a chip , computer hardware , operating system , programming language , telecommunications , bubble , maximum bubble pressure method
The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model andnetwork-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to support high-performance systems with numerous hardware kernels. This paper documents the API, describes the common infrastructure, and quantifies the performance of a complete implementation. Furthermore, the overhead, in terms of resource utilization, is reported along with the ability to integrate hard and soft processor cores with purely hardware kernels being demonstrated
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