Design and Analysis of a New Carbon Nanotube Full Adder Cell
Author(s) -
Mahdiar Ghadiry,
Asrulnizam Abd Manaf,
Mohammad Taghi Ahmadi,
Hatef Sadeghi,
Mahdieh Nadi Senejani
Publication year - 2011
Publication title -
journal of nanomaterials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.463
H-Index - 66
eISSN - 1687-4129
pISSN - 1687-4110
DOI - 10.1155/2011/906237
Subject(s) - adder , power–delay product , carbon nanotube field effect transistor , cmos , serial binary adder , computer science , electronic circuit , transistor , electronic engineering , mosfet , power (physics) , circuit design , materials science , electrical engineering , field effect transistor , embedded system , engineering , voltage , physics , quantum mechanics
A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the presented full adder cell. A new method is used in order to design a full-swing full adder cell with low number of transistors. The proposed full adder is implemented in MOSFET-like carbon nanotube technology and the layout is provided based on standard 32 nm technology from MOSIS. The simulation results using HSPICE show that there are substantial improvements in both power and performance of the proposed circuit compared to the latest designs. In addition, the proposed circuit has been implemented in conventional 32 nm process to compare the benefits of using MOSFET-like carbon nanotubes in arithmetic circuits over conventional CMOS technology. The proposed circuit can be applied in very high performance and ultra-low-power applications
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