From Coherent States in Adjacent Graphene Layers toward Low-Power Logic Circuits | Zendy

Leonard F. Register | Zendy; Dipanjan Basu | Zendy; Dharmendar Reddy | Zendy

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From Coherent States in Adjacent Graphene Layers toward Low-Power Logic Circuits

Author(s) -

Leonard F. Register,

Dipanjan Basu,

Dharmendar Reddy

Publication year - 2010

Publication title -

advances in condensed matter physics

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.314

H-Index - 26

eISSN - 1687-8124

pISSN - 1687-8108

DOI - 10.1155/2011/258731

Subject(s) - transistor , electronic circuit , field effect transistor , logic gate , bilayer graphene , graphene , coherent states , materials science , voltage drop , power (physics) , gating , drop (telecommunication) , cmos , optoelectronics , physics , nanotechnology , electrical engineering , voltage , quantum mechanics , engineering , physiology , biology , quantum

Colleagues and we recently proposed a new type of transistor, a Bilayer PseudoSpin Field Effect Transistor (BiSFET), based on many-body coherent states in coupled electron and hole layers in graphene. Here we review the basic BiSFET device concept and ongoing efforts to determine how such a device, which would be far from a drop-in replacement for MOSFETs in CMOS logic, could be used for low-power logic operation, and to model the effects of engineerable device parameters on the formation and gating of interlayer coherent state

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