Multiloop Parallelisation Using Unrolling and Fission | Zendy

Yuet Ming Lam | Zendy; José G. F. Coutinho | Zendy; Chun Hok Ho | Zendy; Philip Heng Wai Leong | Zendy; Wayne Luk | Zendy

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Multiloop Parallelisation Using Unrolling and Fission

Author(s) -

Yuet Ming Lam,

José G. F. Coutinho,

Chun Hok Ho,

Philip Heng Wai Leong,

Wayne Luk

Publication year - 2010

Publication title -

international journal of reconfigurable computing

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.236

H-Index - 16

eISSN - 1687-7209

pISSN - 1687-7195

DOI - 10.1155/2010/475620

Subject(s) - loop unrolling , computer science , parallel computing , speedup , field programmable gate array , microprocessor , factor (programming language) , computer hardware , programming language , compiler

A technique for parallelising multiple loops in a heterogeneous computing system is presented. Loops are first unrolled and then broken up into multiple tasks which are mapped to reconfigurable hardware. A performance-driven optimisation is applied to find the best unrolling factor for each loop under hardware size constraints. The approach is demonstrated using three applications: speech recognition, image processing, and the N-Body problem. Experimental results show that a maximum speedup of 34 is achieved on a 274 MHz FPGA for the N-Body over a 2.6 GHz microprocessor, which is 4.1 times higher than that of an approach without unrolling

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