Low Phase Noise and High Conversion Gain Oscillator Mixer Constructed with a 0.18-μ m CMOS Technology
Author(s) -
ChinLung Yang,
ChihHsiang Peng,
YiChyun Chiang
Publication year - 2009
Publication title -
international journal of microwave science and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.125
H-Index - 11
eISSN - 1687-5834
pISSN - 1687-5826
DOI - 10.1155/2009/715641
Subject(s) - pmos logic , nmos logic , phase noise , cmos , physics , dbc , electrical engineering , algorithm , materials science , optoelectronics , computer science , transistor , voltage , engineering , optics , quantum mechanics
This paper presents a compact down-conversion oscillator mixer fabricated with a 0.18-μm CMOS technology. The oscillator mixer consists of a conventional nMOS differential coupled oscillator, a switch stage, and a pMOS cross-coupled pair which is used to release the design constraint between the conversion gain and the start-up condition. Since the switch stage and the pMOS cross-coupled pair are stacked on the nMOS differential oscillator, the bias currents of the switch stage and the pMOS cross-coupled pair can be entirely reused, so as to reduce the power dissipation. The experimental results show a conversion gain of 6.5 dB at 2.1 GHz associated with a single-sideband (SSB) noise figure of below 13 dB. The oscillator mixer also exhibits a tuning range of 184 MHz and a phase noise of −116 dBc/Hz at 1-MHz offset from the LO frequency of 6.8 GHz, and it consumes 11 mA from 1.8 V bias voltage
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