Dynamic Hardware Development
Author(s) -
Stephen Craven,
Peter Athanas
Publication year - 2008
Publication title -
international journal of reconfigurable computing
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.236
H-Index - 16
eISSN - 1687-7209
pISSN - 1687-7195
DOI - 10.1155/2008/901328
Subject(s) - control reconfiguration , computer science , reconfigurability , leverage (statistics) , computer architecture , field programmable gate array , embedded system , high level synthesis , reconfigurable computing , benchmarking , operating system , marketing , machine learning , business
Applications that leverage the dynamic partial reconfigurability of modern FPGAs arefew, owing in large part to the lack of suitable tools and techniques to create them. Whilethe trend in digital design is towards higher levels of design abstractions, forgoing hardwaredescription languages in some cases for high-level languages, the development of a reconfigurabledesign requires developers to work at a low level and contend with many poorlydocumented architecture-specific aspects. This paper discusses the creation of a high-leveldevelopment environment for reconfigurable designs that leverage an existing high-level synthesistool to enable the design, simulation, and implementation of dynamically reconfigurablehardware solely from a specification written in C. Unlike previous attempts, this approachencompasses the entirety of design and implementation, enables self-re-configurationthrough an embedded controller, and inherently handles partial reconfiguration. Benchmarkingnumbers are provided, which validate the productivity enhancements this approachprovides
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